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Figure 1.1 shows the block-diagram of the rtty program. It includes an FSK demodulation block, an UART emulator block, a character terminal and some monitoring blocks.
The demodulator section takes audio samples as the input and generates a ``0'' or ``1'' logic level at the output depending on the frequency of the input signal. This section is mainly based on digital filters, and works as follows:
The input signal is filtered through a two bandpass filters. One filter is tuned to the MARK frequency while the other is tuned to the SPACE frequency. As a result, two separated bands are obtained. Then, the ``rms'' amplitude of each band is computed. This is achieved by squaring the band signals and then low-pass filtering the result. The two ``rms'' amplitudes are then subtracted and the sign of the result is the logic output value. In the actual implementation the subtraction and the low-pass filter are swapped, and only one low-pass filter is needed. The response of such section is shown in figure 1.2.
The bandpass filters are second order ``biquads'', with a Q adjusted to obtain the desired bandwidth. The low-pass filter is implemented by two biquadratic sections, yielding an stopband attenuation of 80 dB/dec. The bandwidth of all the filters is directly related to the data rate.
Following the demodulator is the UART emulator block. This section first tries to obtain a clock signal for each bit in the DPLL block. Then, using this synchronization signal, the data bits are assembled according to the data settings to obtain characters. These characters are checked against errors and then printed to stdout. If the data length is 5 bits a BAUDOT encoding is assumed, and therefore the characters are translated to ASCII before its printing.
