ANALOG CIRCUIT DESIGN
GROUP
We are a small group of people of the department of "Electricidad
y
Electrónica" of the University of Valladolid (Spain). Our main
research field since year 2000 is the design of analog integrated
circuits. Currently, our work is mainly focused on the design of analog
to digital converters for wireless and high-speed data communications
applications.
People
involved
Now:
Jesús Arias |
Phd
|
Professor
|
Lourdes Enríquez |
Phd
|
Professor |
Luis Quintanilla |
Phd
|
Professor |
José Vicente |
Phd
|
Professor |
Jesús M. Hernández |
Phd
|
Professor |
Jokin Segundo
|
Phd Student
|
Teaching assistant
|
Before:
Juan Barbolla
|
Phd, professor, department head
|
died on April 2005
|
David Bisbal
|
Phd student
|
Left on Oct 2004
|
Jacinto San Pablo
|
Phd student
|
Left on Feb 2005
|
Our work
- Low- Voltage circuits
- Switched-Opamp & filter page (English)
(Español)
- Sample & Hold circuits
- Nyquist-rate ADCs
- 40Ms/s, 10-bit, 12-mW, time-interleaved pipeline ADC for
54Mbit/s wireless-LANs
- Sigma-Delta ADCs
- High-order stable multibit modulators (TCAS-I
paper (2003)) (US Patent)
- Sigma-delta DAC linearization techniques (TCAS-I paper (2005)) (US Patent pending)
- Continuous-time sigma-delta ADCs
- Complex, 20MHz bandwidth ADC for 54Mbit/s wireless-LANs
- Jitter-insensitive, current-mode ADCs (ES Patent)
- Tunable band-pass ADCs for HF radio
- High-speed ADCs for Gigabit Ethernet (SRC project)
Projects
- U.S. Semiconductor Research
Corporation (SRC) 2004-2006
- Title: Delta-Sigma ADCs for High Speed Data Communications
- Task Leader: Juan Barbolla
- Principal investigator: Jesús Arias
- Spain. Ministerio de
Educación y Ciencia. 2007-
- Title: Diseño de convertidores Analógico/Digital
CMOS de altas prestaciones para sistemas de transmisión de datos.
- Principal investigator: Jesús Arias
Collaborations
- Wireless Research Department. Agere Systems (formerly at Bell
Labs, Murray Hill, NJ, USA )
- Ethernet Division. Agere Systems Spain (formerly Massana).
(Madrid, Spain)